1. Field of the Invention
This invention relates in general to an electrically and programmable read only flash memory, and more specifically relates to an electrically programmable read only flash memory that has a buried gate structure.
2. Description of Related Art
Read only memory (ROM) is a kind of non-volatile memory, in which the stored memory or data are not erased when power is switched off Alternately, data can be erased and rewritten on an erasable programmable ROM (EPROM), but erasing the EPROM requires irradiation by an ultra-violet ray, which raises the cost of the package. Besides, when the EPROM erases data, the program or data stored in the EPROM are completely erased so that each modification must be performed from the beginning. This takes a lot of time. An electrically erasable programmable read only memory (EEPROM), commonly used for modifying portions of data, does not have the above shortcomings, and because erasing and re-input are processed bit by bit, data can be written, read, and erased many times. Recently, an electrically erasable programmable read only memory with a shorter access time has been developed. Its access time is between 70-80 ns and is called "flash memory" by Intel corp., U.S. Flash memory is similar in structure to EEPROM, and furthermore the erasing process is performed block by block within about 1 or 2 seconds to shorten access time and to reduce manufacturing cost.
The flash memory cell usually includes a double layer gate structure. One layer is a polysilicon-floating gate to store charges, and the other layer is a control gate to control data access. The floating gate is on the bottom of the control gate, which usually floats without connection to other circuits, while the control gate usually connects to the word line. According to the channel hot electron effect, when data are stored into the cell, a voltage is applied to the drain and another voltage, higher than the drain voltage, is also applied to the control gate. This makes hot electron eject from the source, pass through the tunnel oxide near the drain, and inject into and be trapped in the floating gate. This raises the threshold voltage of the transistor and stores data into it. When the memorized data is electrically erased from the memory cell, a proper positive voltage is applied to the source to make the hot electrons trapped in the floating gate escape from the tunnel oxide, which erases data and restores the floating transistor to its pre-data storage state.
FIG. 1 shows a cross-sectional view of a conventional read only flash memory cell. The memory cell mainly comprises a floating transistor having a double-layer gate structure, the layers of which are the polysilicon floating gate 10 for charge storage and the control gate 12 for data access control. The floating transistor furthermore comprises a tunnel oxide 14, a gate oxide 16, a drain 18 and a source 20. The floating gate is located under the control gate, which usually floats without connection to other circuits, while the control gate is coupled to the word line.
The programming principle of the above-mentioned read only flash memory is the channel hot electron effect. When data are stored into the cells, a voltage is applied to the drain 18 on the substrate 22 and another voltage higher than the drain voltage is applied to the control gate 12. This makes hot electrons eject out of the source 20 and pass through the tunnel oxide 14 in the vicinity of the drain 18, then inject into and be trapped inside the floating gate 10. This action stores data into the cells and raises the threshold voltage of the floating transistor. When data are erased from the cells, a proper voltage is applied to the drain 18 to force electrons trapped inside the floating gate 10 to escape through the tunnel oxide 14 again. This erases the data and restores the floating transistor to its pre-data storage state.
Conventionally, there are two ways to shorten the operation time of programming and electrically erasing the read only flash memory as well as to enhance the tunnel electric field. One way is to enlarge the overlap area between the floating gate and the control gate, that is, to raise the capacitance coupling ratio of the read only flash memory. The other way is to raise the operation voltage. The method to increase the capacitance coupling ratio typically uses the space above the isolating region, including the field oxide (FOX) or the shallow trench isolation (STI), to increase the overlap area between the floating gate and the control gate. However, with the development of modern semiconductor technology trends towards high integration and high density of memory cells, it is desirable to have increasingly smaller memory cells. Therefore, the above method is contrary to future development. On the other hand, increasing the operation voltage of programming and electrically erasing is also contrary to modern tendencies. A lower operation voltage is desirable for modern semiconductor technology in order to avoid dissipation of heat and signal interference. Therefore, the method mentioned above will not work in future, either. Besides, to increase the operation voltage not only causes the band-to-band tunneling effect between the floating gate and the control gate but also consumes a large amount of electric power, which causes a reliability problem. In addition, increasing the operation voltage requires an additional high voltage pump circuit to amplify the input voltage, which further occupies more wafer area and slows operation time.